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RosettaCodeData/Task/Bitwise-operations/SystemVerilog
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Ingy döt Net f23f22d71c Initial data commit 2023-07-01 13:44:08 -04:00
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bitwise-operations-1.v Initial data commit 2023-07-01 13:44:08 -04:00
bitwise-operations-2.v Initial data commit 2023-07-01 13:44:08 -04:00